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/ Developer CD Series 1995 August: Tool Chest / Dev.CD Aug 95 TC / Dev.CD Aug 95 TC.toast / Tool Chest / Interfaces / UniversalInterfaces 2.0 / PInterfaces / MachineExceptions.p < prev    next >
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Text File  |  1995-04-18  |  4.0 KB  |  183 lines  |  [TEXT/MPS ]
  1. {
  2.      File:        MachineExceptions.p
  3.  
  4.      Contains:    Processor Exception Handling Interfaces .
  5.  
  6.      Version:    Technology:    System 7.5
  7.                  Package:    Universal Interfaces 2.0 in “MPW Latest” on ETO #17
  8.  
  9.      Copyright:    © 1984-1995 by Apple Computer, Inc.
  10.                  All rights reserved.
  11.  
  12.      Bugs?:        If you find a problem with this file, use the Apple Bug Reporter
  13.                  stack.  Include the file and version information (from above)
  14.                  in the problem description and send to:
  15.                      Internet:    apple.bugs@applelink.apple.com
  16.                      AppleLink:    APPLE.BUGS
  17.  
  18. }
  19.  
  20. {$IFC UNDEFINED UsingIncludes}
  21. {$SETC UsingIncludes := 0}
  22. {$ENDC}
  23.  
  24. {$IFC NOT UsingIncludes}
  25.  UNIT MachineExceptions;
  26.  INTERFACE
  27. {$ENDC}
  28.  
  29. {$IFC UNDEFINED __MACHINEEXCEPTIONS__}
  30. {$SETC __MACHINEEXCEPTIONS__ := 1}
  31.  
  32. {$I+}
  33. {$SETC MachineExceptionsIncludes := UsingIncludes}
  34. {$SETC UsingIncludes := 1}
  35.  
  36.  
  37. {$IFC UNDEFINED __TYPES__}
  38. {$I Types.p}
  39. {$ENDC}
  40. {    ConditionalMacros.p                                            }
  41.  
  42. {$PUSH}
  43. {$ALIGN MAC68K}
  44. {$LibExport+}
  45.     
  46. TYPE
  47.     AreaID = KernelID;
  48.  
  49. { Machine Dependent types for PowerPC: }
  50.     MachineInformationPowerPC = RECORD
  51.         CTR:                    UnsignedWide;
  52.         LR:                        UnsignedWide;
  53.         PC:                        UnsignedWide;
  54.         CR:                        LONGINT;
  55.         XER:                    LONGINT;
  56.         MSR:                    LONGINT;
  57.     END;
  58.  
  59.     RegisterInformationPowerPC = RECORD
  60.         R0:                        UnsignedWide;
  61.         R1:                        UnsignedWide;
  62.         R2:                        UnsignedWide;
  63.         R3:                        UnsignedWide;
  64.         R4:                        UnsignedWide;
  65.         R5:                        UnsignedWide;
  66.         R6:                        UnsignedWide;
  67.         R7:                        UnsignedWide;
  68.         R8:                        UnsignedWide;
  69.         R9:                        UnsignedWide;
  70.         R10:                    UnsignedWide;
  71.         R11:                    UnsignedWide;
  72.         R12:                    UnsignedWide;
  73.         R13:                    UnsignedWide;
  74.         R14:                    UnsignedWide;
  75.         R15:                    UnsignedWide;
  76.         R16:                    UnsignedWide;
  77.         R17:                    UnsignedWide;
  78.         R18:                    UnsignedWide;
  79.         R19:                    UnsignedWide;
  80.         R20:                    UnsignedWide;
  81.         R21:                    UnsignedWide;
  82.         R22:                    UnsignedWide;
  83.         R23:                    UnsignedWide;
  84.         R24:                    UnsignedWide;
  85.         R25:                    UnsignedWide;
  86.         R26:                    UnsignedWide;
  87.         R27:                    UnsignedWide;
  88.         R28:                    UnsignedWide;
  89.         R29:                    UnsignedWide;
  90.         R30:                    UnsignedWide;
  91.         R31:                    UnsignedWide;
  92.     END;
  93.  
  94.     FPUInformationPowerPC = RECORD
  95.         Registers:                ARRAY [0..31] OF UnsignedWide;
  96.         FPSCR:                    LONGINT;
  97.         Reserved:                LONGINT;
  98.     END;
  99.  
  100.  
  101. CONST
  102.     writeReference                = 0;
  103.     readReference                = 1;
  104.     fetchReference                = 2;
  105.  
  106.     
  107. TYPE
  108.     MemoryReferenceKind = LONGINT;
  109.  
  110.     MemoryExceptionInformation = RECORD
  111.         theArea:                AreaID;
  112.         theAddress:                LogicalAddress;
  113.         theError:                OSStatus;
  114.         theReference:            MemoryReferenceKind;
  115.     END;
  116.  
  117.  
  118. CONST
  119.     unknownException            = 0;
  120.     illegalInstructionException    = 1;
  121.     trapException                = 2;
  122.     accessException                = 3;
  123.     unmappedMemoryException        = 4;
  124.     excludedMemoryException        = 5;
  125.     readOnlyMemoryException        = 6;
  126.     unresolvablePageFaultException = 7;
  127.     privilegeViolationException    = 8;
  128.     traceException                = 9;
  129.     instructionBreakpointException = 10;
  130.     dataBreakpointException        = 11;
  131.     integerException            = 12;
  132.     floatingPointException        = 13;
  133.     stackOverflowException        = 14;
  134.     terminationException        = 15;
  135.  
  136.     
  137. TYPE
  138.     ExceptionKind = LONGINT;
  139.  
  140.     ExceptionInfo = RECORD
  141.         CASE INTEGER OF
  142.         0: (
  143.             memoryInfo:                    ^MemoryExceptionInformation;
  144.            );
  145.     END;
  146.  
  147.     ExceptionInformationPowerPC = RECORD
  148.         theKind:                ExceptionKind;
  149.         machineState:            ^MachineInformationPowerPC;
  150.         registerImage:            ^RegisterInformationPowerPC;
  151.         FPUImage:                ^FPUInformationPowerPC;
  152.         info:                    ExceptionInfo;
  153.     END;
  154.  
  155. {$IFC GENERATINGPOWERPC }
  156.     ExceptionInformation = ExceptionInformationPowerPC;
  157.  
  158.     MachineInformation = MachineInformationPowerPC;
  159.  
  160.     RegisterInformation = RegisterInformationPowerPC;
  161.  
  162.     FPUInformation = FPUInformationPowerPC;
  163.  
  164. {$ENDC}
  165. { Note:    An ExceptionHandler is NOT a UniversalProcPtr.
  166.             It must be a native function pointer with NO routine descriptor. }
  167.     ExceptionHandler = ProcPtr;  { FUNCTION (VAR theException: ExceptionInformationPowerPC): OSStatus; }
  168.  
  169. { Routine for installing per-process exception handlers }
  170.  
  171. FUNCTION InstallExceptionHandler(theHandler: ExceptionHandler): ExceptionHandler;
  172.  
  173. {$ALIGN RESET}
  174. {$POP}
  175.  
  176. {$SETC UsingIncludes := MachineExceptionsIncludes}
  177.  
  178. {$ENDC} {__MACHINEEXCEPTIONS__}
  179.  
  180. {$IFC NOT UsingIncludes}
  181.  END.
  182. {$ENDC}
  183.